Intel MFS5520VI Ficha de datos descargar pdf (Pagina 6)

List of Tables Intel® Compute Module MFS5520VI TPS

Revision 1.3

Intel order number: E64311-005

List of Tables

Table 1. Mixed Processor Configurations .....................................................................................8

Table 2. Mirroring DIMM Population Rules Variance across Nodes........................................... 15

Table 3. Intel

Compute Module MFS5520VI PCI Bus Segment Characteristics....................... 18

Table 4. Video Modes ................................................................................................................. 21

Table 5. Board Connector Matrix ................................................................................................23

Table 6. Power Connector Pin-out (J1A1) .................................................................................. 23

Table 7. VGA Connector Pin-out (J6A1)..................................................................................... 24

Table 8. 120-pin I/O Mezzanine Card Connector Pin-out ........................................................... 25

Table 9. 120-pin I/O Mezzanine Card Connector Signal Definitions........................................... 26

Table 10. 40-pin I/O Mezzanine Card Connector Pin-out ........................................................... 28

Table 11. 96-pin Midplane Signal Connector Pin-out .................................................................28

Table 12. Internal 9-pin Serial Header Pin-out (J9J1)................................................................. 29

Table 13. External USB Connector Pin-out ................................................................................30

Table 14. Pin-out of Internal USB Connector for low-profile Solid State Drive (J9B7)................ 30

Table 15. Recovery Jumpers ......................................................................................................32

Table 16. MFS5520VI Sensors................................................................................................... 37

Table 17. POST Error Messages and Handling.......................................................................... 42

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