Intel RH80532GC033512 Ficha de datos descargar pdf (Pagina 53)

System Bus Signal Quality Specifications

Mobile Intel



Pentium



4 Processor-M Datasheet 53

Table 29. Ringback Specifications for PWRGOOD Input and TAP Signal Groups

NOTES:

1. All signal integrity specifications are measured at the processor silicon.

2. Unless otherwise noted, all specifications in this table apply to all Mobile Intel Pentium 4 Processor-M

frequencies.

3. Please see Section 3.3 for maximum allowable overshoot.

4. Please see Section 2.11 for the DC specifications.

Signal Group Transition

Maximum Ringback

(with Input Diodes Present)

Unit Figure

Notes

TAP and PWRGOOD 0 → 1 Vt+(max) TO Vt-(max) V 28 1,2,3,4

TAP and PWRGOOD 1 → 0 Vt-(min) TO Vt+(min) V 29 1,2,3,4

Figure 26. Low-to-High System Bus Receiver Ringback Tolerance

GTLREF

Noise

Margin

+10% GTLREF

-10% GTLREF

Figure 27. High-to-Low System Bus Receiver Ringback Tolerance

oise

Margin

GTLREF

+10% GTLREF

-10% GTLREF

1 2 ... 48 49 50 51 52 53 54 55 56 57 58 ... 96 97

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Intel RH80532GC033512 Ficha de datos Pagina 53