Intel RH80532GC033512 Ficha de datos Pagina 54

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System Bus Signal Quality Specifications
54 Mobile Intel
Pentium
4 Processor-M Datasheet
Figure 28. Low-to-High System Bus Receiver Ringback Tolerance for PWRGOOD and TAP
Buffers
Figure 29. High-to-Low System Bus Receiver Ringback Tolerance for PWRGOOD and TAP
Buffers
0.5 * Vcc
Vt+ (min)
Vt+ (max)
Vt- (max)
Vcc
Allowable Ringback
Vss
Threshold Region to switch
receiver to a logic 1.
0.5 * Vcc
Vt+ (min)
Vt- (max)
Vcc
Vss
Vt- (min)
Threshold Region to switch
receiver to a logic 0.
Allowable Ringback
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