Intel E3-1275 Ficha de datos Pagina 142

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Processor Configuration Registers
142 Datasheet, Volume 2
2.8.17 MINGNT—Minimum Grant Register
The Integrated Graphics Device has no requirement for the settings of Latency Timers.
2.8.18 MAXLAT—Maximum Latency Register
The Integrated Graphics Device has no requirement for the settings of Latency Timers.
B/D/F/Type: 0/2/0/PCI
Address Offset: 3Eh
Reset Value: 00h
Access: RO
Size: 8 bits
Bit Attr
Reset
Value
RST/
PWR
Description
7:0 RO 00h Uncore
Minimum Grant Value (MGV)
The IGD does not burst as a PCI compliant master.
B/D/F/Type: 0/2/0/PCI
Address Offset: 3Fh
Reset Value: 00h
Access: RO
Size: 8 bits
Bit Attr
Reset
Value
RST/
PWR
Description
7:0 RO 00h Uncore
Maximum Latency Value (MLV)
The IGD has no specific requirements for how often it needs to
access the PCI bus.
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